In this manual, assertion and negation are used to specify forcing a signal to a particular state.
In particular, assertion and assert refer to a signal that is active or true; negation and negate
indicate a signal that is inactive or false. These terms are used independently of the voltage
level (high or low) that they represent.
Data and address sizes are defined as follows:
Conventions Used in This Manual
The following typographical conventions are used in this document:
bold
is used for user input that you type just as it appears; it is also used for commands, options
and arguments to commands, and names of programs, directories and files.
italic
is used for names of variables to which you assign values. Italic is also used for comments
in screen displays and examples, and to introduce new terms.
0x Specifies a hexadecimal number
% Specifies a binary number
& Specifies a decimal number
Byte 8 bits, numbered 0 through 7, with bit 0 being the least significant.
Half word 16 bits, numbered 0 through 15, with bit 0 being the least significant.
Word 32 bits, numbered 0 through 31, with bit 0 being the least significant.
Double word 64 bits, numbered 0 through 63, with bit 0 being the least significant.
Conventions Used in This Manual
The following typographical conventions are used in this document:
bold
is used for user input that you type just as it appears; it is also used for commands, options
and arguments to commands, and names of programs, directories and files.
italic
is used for names of variables to which you assign values. Italic is also used for comments
in screen displays and examples, and to introduce new terms.
is used for system output (for example, screen displays, reports), examples, and system
prompts.
<Enter>, <Return> or <CR>
represents the carriage return or Enter key.
Ctrl
represents the Control key. Execute control characters by pressing the Ctrl key and the
letter simultaneously, for example, Ctrl-d.
Product Features
The IPMC712 and IPMC761 are optional modules that provide backward compatibility with
earlier Emerson products using the MVME761 or MVME712M rear transition modules.
General Functionality
Both models are designed around a PMC form factor and both modules incorporate a PCI-toISA bridge, Ultra-wide SCSI adapter, and Super I/O functionality. Both modules are single wide,
standard length, standard height PMC boards. They attach to the host board PCI bus via the
PMC P11, P12, P13, P14, and P15 connectors.
■ One single-ended ultra-wide SCSI port
■ One parallel port
■ Four serial ports (2 or 3 asynchronous and 1 or 2 synchronous/asynchronous, depending
on the module)
With this PMC card configuration, the memory mezzanine, one PMC slot, and the PMCspan
are still available, providing support for additional product customization.
IPMC Mode
In IPMC mode, the MVME 6100, MVME5500, and MVME5100 support legacy MVME761 or
MVME712M rear transition modules (with limited PMC I/O) when an IPMC712 or IPMC761
module is installed in PMC slot 1. In this configuration, signals used by wide (16-bit SCSI
conflict with signals that are used by PMC slot 2 rear I/O.
Design Features
The following sections describe the basic features that are incorporated in the design of both
IPMC modules.
PCI Bus Interface
Both modules contain four EIA-E700 AAAB connectors, which provide a 32-bit PCI interface to
an IEEE P1386.1 PMC-compliant host board such as the MVME6100, MVME5500, or
MVME5100.
Connectors P11-P13 on each module provid
Configurable Switches
S1 Switch
A 1x4 switch (S1) is provided on each module for configuring GPIO pins 2 and 3. The factory
default setting is for Ultra-Speed and Ultra-Wide SCSI. Refer to Table 3-1 on page 16 for the
GPIO pin assignments and to Figure 3-1 on page 16 for the default switch settings.
S2 Switch
There is a 1x2 switch (S2) on each module that is in line with the PCI-to-ISA bridge for selecting
either AD[11] IDSEL or IDSELB for connection to the Winbond chip, depending on the IPMC
module you are using.
Note The S2 is not dependent on either IPMC module. It is dependent on either the
MVME5100, MVME5500, or MVME6100 host board. The IPMC modules are shipped
configured for these boards.
Details on IDSEL mapping and PCI arbitration assignments for these SBCs can be found in
Chapter 3, Programming. An illustration showing the S2 switch settings can be found in Figure
3-2 on page 17.
PCI-to-ISA Bridge (PIB)
The PIB provides the bridging functions between PCI local bus and the ISA local resource bus.
The following are a few of the features of the PIB.
SCSI
The SCSI controller is an LSI Logic SYM53C895A device. The SCSI clock frequency is 40 MHz.
The SCSI controller features:
■ 32-bit PCI Interface with 64-bit addressing
■ 8KB internal SCRIPTS RAM
■ Improved PCI caching design (improves PCI bus efficiency)
The SCSI device maintains backward compatibility with the MVME761 rear transition module
and P2 adapter card. It is also Ultra-wide capable and has a performance of 40MB/s