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MotorolaMVME6100 Single Board Computer Installation and Use P/N: 6806800D58E March 2009

From:Motorola | Author:LIAO | Time :2025-08-20 | 348 Browse: | Share:

About this Manual

Overview of Contents

This manual is divided into the following chapters and appendices:

Chapter 1, Hardware Preparation and Installation, provides MVME6100 board preparation and 

installation instructions, as well as ESD precautionary notes.

Chapter 2, Startup and Operation, provides the power-up procedure and identifies the switches 

and indicators on the MVMEM6100.

Chapter 3, MOTLoad Firmware, describes the basic features of the MOTLoad firmware product.

Chapter 4, Functional Description, describes the MVME6100 on a block diagram level.

Chapter 5, Pin Assignments, provides pin assignments for various headers and connectors on 

the MMVE6100 single-board computer.

Appendix A, Specifications, provides power requirements and environmental specifications.

Appendix B, Thermal Validation, provides information to conduct thermal evaluations and 

identifies thermally significant components along with their maximum allowable operating 

temperatures.

Appendix C, Related Documentation, provides a listing of related Emerson manuals, vendor 

documentation, and industry specifications.

The MVME61006E Series Single-Board Computer Installation and Use manual provides the 

information you will need to install and configure your MVME61006E single-board computer 

(hereinafter referred to as MVME6100). It provides specific preparation and installation 

information, and data applicable to the board.

of the printing date of this manual, the MVME61006E supports the models listed below.The following table describes the conventions used throughout this manual. 

Overview This chapter contains the following information: z Board preparation and installation instructions z ESD precautionary notes 1.2 Description The MVME6100 is a single-slot, single-board computer based on the MPC7457 processor, the MV64360 system controller, the Tsi148 VME Bridge ASIC, up to 1 GB of ECC-protected DDR DRAM, up to 128MB of flash memory, and a dual Gigabit Ethernet interface. Front panel connectors on the MVME6100 board include: two RJ-45 connectors for the Gigabit Ethernet, one RJ-45 connector for the asynchronous serial port with integrated LEDs for BRDFAIL and CPU run indication, and a combined reset and abort switch. The MVME6100 is shipped with one additional asynchronous serial port routed to an on-board header. The MVME6100 contains two IEEE1386.1 PCI, PCI-X capable mezzanine card slots. The PMC slots are 64-bit capable and support both front and rear I/O. All I/O pins of PMC slot 1 and 46 I/O pins of PMC slot 2 are routed to the 5-row DIN, P2 connector. I/O pins 1 through 64 from J14 of PMC slot 1 are routed to row C and row A of P2. I/O pins 1 through 46 from J24 of PMC slot 2 are routed to row D and row Z of P2. The MVME6100 has two planar PCI buses (PCI0 and PCI1). In order to support a more generic PCI bus hierarchy nomenclature, the MV64360 PCI buses will be referred to in this document as PCI bus 0 (root bridge instance 0, bus 0) and PCI bus 1 (root bridge instance 1, bus 0). PCI bus 1 connects to PMC slots 1 and 2 of the board. PCI bus 0 connects to the Tsi148 VME Bridge ASIC and PMCspan bridge (PCI6520). This interface operates at PCI-X (133 MHz) speed. Both PCI planar buses are controlled by the MV64360 system controller. Voltage Input/Output (VIO) for PCI bus 1 is set by the location of the PMC keying pins; both pins should be set to designate the same VIO, either +3.3V or +5V.

The MVME6100 board interfaces to the VMEbus via the P1 and P2 connectors, which use 5-row 

160-pin connectors as specified in the VME64 Extension Standard. It also draws +12V and +5V 

power from the VMEbus backplane through these two connectors. The +3.3V, +2.5V, +1.8V, 

and processor core supplies are regulated on-board from the +5V power.

For maximum VMEbus performance, the MVME6100 should be mounted in a VME64x 

compatible backplane (5-row). 2eSST transfers are not supported when a 3-row backplane is 

used.

The MVME6100 supports multiple modes of I/O operation. By default, the board is configured 

for Ethernet port 2 to the front panel (non-specific transition module), and PMC slot 1 in IPMC 

mode. The board can be configured to route Ethernet port 2 to P2 and support MVME712M or 

MVME761 transition modules. The front/rear Ethernet and transition module options are 

configured by jumper block J30.

Selection of PMC slot 1 in PMC or IPMC mode is done by the jumper blocks J10, J15-J18, and 

J25-J28 (see Table 1-2 on page 19). IPMC mode is selected when an IPMC712 or IPMC761 

module is used. If an IPMC is used, J30 should be configured for the appropriate transition 

module (see J30 configuration options as illustrated in Front/Rear Ethernet and Transition Module 

Options Header (J30) on page 23).

The IPMC712 and IPMC761 use AD11 as the IDSEL line for the Winbond PCI-ISA bridge device. 

This device supplies the four serial and one parallel port of the IPMC7xx module. The Discovery 

II PHB (MV64360) does not recognize address lines below AD16. For this reason, although an 

IPMC7xx module may be used on an MVME6100, the serial and parallel ports are not available, 

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