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MotorolaMVME187 RISC Single Board Computer Installation Guide MVME187IG/D4

From:Motorola | Author:LIAO | Time :2025-08-20 | 1004 Browse: | 🔊 Click to read aloud ❚❚ ▶ | Share:

Motorola 

Publication Number Description

MC88100UM MC88100 RISC Microprocessor User's Manual

MC88200UM MC88200 Cache/Memory Management Unit 

(CMMU) User's Manual 

MC88204 MC88204 64K-Byte Cache/Memory Management 

Unit (CMMU) data sheet A

Non-Motorola Peripheral Controllers Publications Bundle For your convenience, we have collected user's manuals for each of the peripheral controllers used on the MVME187 from the suppliers. This bundle, which can be ordered as part number 68- 1X7DS, includes the following manuals

Part Number Description

NCR53C710DM NCR 53C710 SCSI I/O Processor Data Manual

NCR53C710PG NCR 53C710 SCSI I/O Processor Programmer’s Guide

CL-CD2400/2401 Cirrus Logic CD2401 Serial Controller User’s Manual

UM95SCC0100 Zilog Z85230 Serial Communications Controller 

User’s Manual

290218 Intel Networking Components Data Manual

290435 Intel i28F008 Flash Memory Data Sheet

290245 Intel i28F020 Flash Memory Data Sheet

292095 Intel i28F008SA Software Drivers Application Note

292099 Intel i28F008SA Automation and Algorithms 

Application Note

Part Number Description

MK48T08/18B SGS-THOMSON MK48T08 Time Clock/NVRAM 

Data Sheet

MC68230/D MC68230 Parallel Interface Timer (PI/T) Data Sheet

SBCCOMPS/L Customer Letter for Component Alternatives

Applicable Non-Motorola Publications

The following non-Motorola publications are also available from 

the sources indicated. 

Document Title Source

Versatile Backplane Bus: VMEbus, 

ANSI/IEEE Std 1014-1987

(VMEbus Specification) (This is also 

Microprocessor System Bus for 1 to 4 Byte 

Data, IEC 821 BUS)

The Institute of Electrical and 

Electronics Engineers, Inc.

345 East 47th St.

New York, NY 10017 

Bureau Central de la Commission 

Electrotechnique Internationale

3, rue de Varembé

Geneva, Switzerland

ANSI Small Computer System Interface-2 

(SCSI-2), Draft Document X3.131-198X, 

Revision 10c

Global Engineering Documents

15 Inverness Way East

Englewood, CO 80112-5704

CL-CD2400/2401 Four-Channel MultiProtocol Communications Controller Data

Sheet, order number 542400-003

Cirrus Logic, Inc.

3100 West Warren Ave.

Fremont, CA 94538

82596CA Local Area Network Coprocessor 

Data Sheet, order number 290218; and 

82596 User's Manual, order number 296853

Intel Corporation, Literature Sales

P.O. Box 58130

Santa Clara, CA 95052-8130

NCR 53C710 SCSI I/O Processor Data 

Manual, order number NCR53C710DM

NCR Corporation

Microelectronics Products Division

1635 Aeroplaza Dr.

Colorado Springs, CO 80916 NCR 53C710 SCSI I/O Processor 

Programmer’s Guide, order number 

NCR53C710PG

MK48T08(B) Timekeeper TM and 8Kx8 

Zeropower TM RAM data sheet in Static 

RAMs Databook, order number DBSRAM71

SGS-THOMSON Microelectronics 

Group 

Marketing Headquarters

1000 East Bell Rd.

Phoenix, AZ 85022-2699

2Board Level Hardware

Description

This Chapter Covers 

❏ A general description of the MVME187 RISC Single Board 

Computer

❏ Features and specifications

❏ A board-level hardware overview

❏ A detailed hardware functional description, including front 

panel switches and indicators

❏ Memory maps

General Description

The MVME187 is a high functionality VMEbus RISC single board 

computer designed around the M88000 chip set. It features: 

❏ Onboard memory expansion mezzanine module with 

4, 8, 16, 32, 64 or 128MB of onboard DRAM

❏ SCSI bus interface with DMA

❏ Four serial ports with EIA-232-D interface

❏ Centronics (parallel) printer port

❏ Ethernet transceiver interface with DMA

❏ 187Bug debug monitor firmware

Onboard Memory Mezzanine Module

The MVME187 onboard DRAM mezzanine boards are available in 

different sizes and with programmable parity protection or Error 

Checking and Correction (ECC) protection. 

❏ The main board and a single mezzanine board together take 

one slot. 

❏ Motorola software supports mixed parity and ECC memory 

boards on the same main board. 

❏ Mezzanine board sizes are 4, 8, 16, or 32 MB (parity), or 4, 8, 

16, 32, 64, or 128 MB (ECC);

– Two mezzanine boards may be stacked to provide 256MB 

of onboard RAM (ECC) or 64 MB (parity). The stacked 

configuration requires two VMEbus slots. 

❏ The DRAM is four-way interleaved to efficiently support 

cache burst cycles.

❏ The parity mezzanines are only supported on 25 MHz main 

boards. 

A functional description of the Onboard DRAM starts on page 2-15.

SCSI Mass Storage Interface

The MVME187 provides for mass storage subsystems through the 

industry-standard SCSI bus. These subsystems may include 

❏ Hard and floppy disk drives

❏ Streaming tape drives

❏ Other mass storage devices.

A functional description of the SCSI Interface starts on page 2-22.

Serial Ports

The serial ports support standard baud rates of 110 to 38.4K baud. 

All four serial ports use EIA-232-D drivers and receivers located on 

the main board, and all the signal lines are routed to the I/O 

connector. 

A functional description of the Serial Port Interface starts on page 

2-18.

Parallel (Printer) Port

The 8-bit bidirectional parallel port may be used as a Centronicscompatible parallel printer port or as a general parallel I/O port. 

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